Evolutionary Mapping of Neural Networks to Spatial Accelerators

MCML Authors

Eyke Hüllermeier

Prof. Dr.

Core PI

Artificial Intelligence and Machine Learning

Abstract

Spatial accelerators, composed of arrays of compute-memory integrated units, offer an attractive platform for deploying inference workloads with low latency and low energy consumption. However, fully exploiting their architectural advantages typically requires careful, expert-driven mapping of computational graphs to distributed processing elements. In this work, we automate this process by framing the mapping challenge as a black-box optimization problem. We introduce the first evolutionary, hardware-in-the-loop mapping framework for neuromorphic accelerators, enabling users without deep hardware knowledge to deploy workloads more efficiently. On Intel's Loihi 2, our method achieves up to 35% reduction in total latency compared to default heuristics on two sparse multilayer perceptron networks. We further demonstrate the scalability of our approach to multi-chip systems and observe an up to 40% gain in energy efficiency, without explicitly optimizing for it.

inproceedings PTY+26

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GECCO 2026

Genetic and Evolutionary Computation Conference. San José, Costa Rica, Jul 13-17, 2026.

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Authors

A. Pierro • J. Timcheck • J. Yik • M. Lindauer • E. Hüllermeier • M. Wever

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Links

DOI

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In Collaboration

 Intel

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Research Area

 A3 | Computational Models